Document
2:1 HDMI/DVI Switch with Equalization and DDC/CEC Buffers
AD8192
07050–001
FEATURES
2 inputs, 1 output HDMI/DVI links HDMI 1.3a receive and transmit compliant ±7 kV HBM ESD on HDMI input pins 4 TMDS channels per link
Supports 250 Mbps to 2.25 Gbps data rates and beyond Supports 25 MHz to 225 MHz pixel clocks and beyond Fully buffered unidirectional inputs/outputs Switchable 50 Ω on-chip input terminations with
programmable or automatic control on channel switch Equalized inputs and pre-emphasized outputs Low added jitter Output disable feature for reduced power dissipation Switched output termination for building of larger arrays Bidirectional and cascadable DDC buffers (SDA/SCL) DDC bus logic level translation (3.3 V, 5 V) Bidirectional and cascadable CEC buffer with integrated pull-up resistors (27 kΩ) Hot plug detect pulse low on channel switch Standards compatible: DVI, HDMI 1.3a, HDCP, I2C Serial (I2C slave) control interface 56-lead, 8 mm × 8 mm LFCSP, RoHS-compliant pack.