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XC9536XL

Xilinx

High Performance CPLD


Description
0 R XC9536XL High Performance CPLD DS058 (v1.9) April 3, 2007 00 Features 5 ns pin-to-pin logic delays System frequency up to 178 MHz 36 macrocells with 800 usable gates Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (36 user I/O pins) - 64-pin VQFP (36 user I/O pins) - Pb-free ...



Xilinx

XC9536XL

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