SI2305DS

P-Channel Power MOSFE Production specification SI2305DS DESCRIPTION SI2305DS is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology. This hight-density process is especially tailored tominimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and notebook computer power management, other battery powered circuits,and low in-line power loss are required. The product is in a very small outline surface mount package. FEATURE 20V/3.3A, RDS(ON) = 68mΩ @VGS = 4.5V 20V/2.2A, RDS(ON) = 89mΩ @VGS = 2.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23 package design PIN CONFIGURATION SOT-23 3 D GS 12 1.Gate 2.Source 3.Drain Maximum Ratings and Thermal Characteristics (TA = 25oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current P...