AD9522-3

Data Sheet 12 LVDS/24 CMOS Output Clock Generator with Integrated 2 GHz VCO AD9522-3 07224-001 FEATURES Low phase noise, phase-locked loop (PLL) On-chip voltage controlled oscillator (VCO) tunes from 1.72 GHz to 2.25 GHz Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz 1 differential or 2 single-ended reference inputs Accepts CMOS, LVPECL, or LVDS references to 250 MHz Accepts 16.62 MHz to 33.3 MHz crystal for reference input Optional reference clock doubler Reference monitoring capability Revertive automatic and manual reference switchover/ holdover modes Glitch-free switchover between references Automatic recovery from holdover Digital or analog lock detect, selectable Optional zero delay operation Twelve 800 MHz LVDS outputs divided into 4 groups Each group of 3 has a 1-to-32 divider with phase delay Additive output jitter as low as 242 fs rms Channel-to-channel skew grouped outputs <60 ps Each LVDS output can be configured as 2 CMOS outputs (for fOUT ≤ 250 MHz) Automatic synchr...