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CD4019BMS
CMOS Quad AND/OR Select Gate
Description
CD4019BMS November 1994 CMOS Quad AND/OR Select Gate Pinout CD4019BMS TOP VIEW B4 1 A3 2 B3 3 A2 4 B2 5 A1 6 B1 7 VSS 8 16 VDD 15 A4 14 Kb 13 D4 = A4 Ka + B4 Kb 12 D3 = A3 Ka + B3 Kb 11 D2 = A2 Ka + B2 Kb 10 D1 = A1 Ka + B1 Kb 9 Ka Features High Voltage Type (20V Rating) Medium Speed Operation tPHL = tPLH = 60ns (typ.) at CL = 50pF, VDD = 10V Standar...
Intersil Corporation
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