74HC573D

CMOS Digital Integrated Circuits Silicon Monolithic 74HC573D 74HC573D 1. Functional Description Octal D-Type Latch with 3-State Outputs 2. General The 74HC573D is a high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. These 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (1) Wide operating temperature range: Topr = -40 to 125 � (Note 1) (2) High speed: tpd = 13 ns (typ.) at VCC = 6.0 V (3) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25 � (4) Balanced propagation delays: tPLH ≈ tPHL (5) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V Note 1: Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after July 2020. 4. Packaging SOIC20 ©2016-2020 1 Toshiba Electronic Devices & Storage Corporation Start of commercial production 2020-07 2020-11-17 Rev.3.0 5. Pin Assignment 74HC573D 6. Marking 7. IEC Logic Symbol ©2016-2020 2 Toshiba Electronic Devices & Storage Corporation 2020-11-17 Rev.3.0 8. Truth Table INPUT OE INPUT LE INPUT D OUTPUT Q H X X Z L L X Qn L H L L L H H H X: Don't Care Z: High Impe...