Document
N84C161, N84C162
Supervisory Circuits with EEPROM Serial 16-Kb I2C Precision Reset Controller and Watchdog Timer (16K)
Description
The N84C161/2 is a complete memory and supervisory solution for microcontroller−based systems. A serial EEPROM memory (16K) with hardware memory write protection, a system power supervisor with brown out protection and a watchdog timer are integrated together in low power CMOS technology. Memory interface is via an I2C bus.
The 1.6−second watchdog circuit returns a system to a known good state if a software or hardware glitch halts or “hangs” the system. The N84C161 watchdog monitors the SDA line, making an additional PC board trace unnecessary. The lower cost N84C162 does not have a watchdog timer.
The power supply monitor and reset circuit protects memory and system controllers during power up/down and against brownout conditions. Five reset threshold voltages support 5 V, 3.3 V and 3 V systems. If power supply voltages are out of tolerance reset signals become active, preventing the system microcontroller, ASIC or peripherals from operating. Reset signals become inactive typically 200 ms after the supply voltage exceeds the reset threshold level. With both active high and low reset signals, interface to microcontrollers and other ICs is simple. In addition, a reset pin can be used as a debounced input for pushbutton manual reset capability.
The N84C161/2 memory features a 16−byte page. In addition, hardware data protection is provided by a write protect pin WP and by a VCC sense circuit that prevents writes to memory whenever VCC falls below the reset threshold or until VCC reaches the reset threshold during power up.
These devices are available in a green SOIC−8 package.
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SOIC−8 CASE 751BD
PIN CONFIGURATION
DC RESET
WP GND
1
8
2 N84C161 7 3 N84C162 6
4
5
VCC RESET SCL SDA
Pin Name DC
RESET WP GND SDA SCL
RESET
PIN FUNCTIONS
Function Do Not Connect Active Low Reset I/O Write Protect Ground Serial Data/Address Clock Input Active High Reset I/O
Features
• Watchdog Monitors SDA Signal (N84C161) • 400 kHz I2C Bus Compatible • 2.7 V to 6 V Operation • Low Power CMOS Technology • 16−Byte Page Write Buffer • Built−in Inadvertent Write Protection
♦ VCC Lock Out ♦ Write Protection Pin, WP
• Active High or Low Reset
♦ Precision Power Supply Voltage Monitor
♦ 5 V, 3.3 V and 3 V Systems
♦ Five Threshold Voltage Options
VCC
Power Supply
ORDERING INFORMATION For Ordering Information details, see page 11.
• 1,000,000 Program/Erase Cycles • Manual Reset • 100 Year Data Retention • 8−Pin SOIC • Commercial and Industrial Temperature Ranges • These Devices are Pb−Free, Halogen Free/BFR Free
and are RoHS Compliant
© Semiconductor Components Industries, LLC, 2016
1
May, 2018 − Rev. 1
Publication Order Number: N84C161/D
N84C161, N84C162
Table 1. RESET THRESHOLD OPTION
Part Dash Number
Minimum Thresh- Maximum Thresh-
old
old
−45
4.50
4.75
−42
4.25
4.50
−30
3.00
3.15
−28
2.85
3.00
−25
2.55
2.70
EXTERNAL LOAD
V CC GND
BLOCK DIAGRAM
D OUT ACK
WORD ADDRESS BUFFERS
SENSEAMPS SHIFT REGISTERS
COLUMN DECODERS
SDA WP
STA RT/ STOP LOGIC
CONTROL LOGIC
XDEC
16K EEPROM
DATA IN STORAGE
HIGH VOLTAGE/ TIMING CONTROL
RESET Controller
STATE COUNTERS
SCL
Only for N84C161
WAT CH DO G Precision Vcc Monitor
SLAVE ADDRESS
COMPARATORS
RESET RESET
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N84C161, N84C162
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Temperature Under Bias
–55 to +125
°C
Storage Temperature
–65 to +150
°C
Voltage on any Pin with Respect to Ground (Note 1) VCC with Respect to Ground Package Power Dissipation Capability (TA = 25°C) Lead Soldering Temperature (10 sec)
−2.0 to VCC + 2.0
V
−2.0 to 7.0
V
1.0
W
300
°C
Output Short Circuit Current (Note 2)
100
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. The minimum DC input voltage is –0.5 V. During transitions, inputs may undershoot to –2.0 V for periods of less than 20 ns. Maximum
DC voltage on output pins is VCC +0.5 V, which may overshoot to VCC +2.0 V for periods of less than 20 ns. 2. Output shorted for no more than one second. No more than one output shorted at a time.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
Parameter
Reference Test Method
Min
Max
NEND (Note 3) Endurance
MIL−STD−883, Test Method 1033
1,000,000
TDR (Note 3) Data Retention
MIL−STD−883, Test Method 1008
100
VZAP (Note 3) ESD Susceptibility
MIL−STD−883, Test Method 3015
2000
ILTH (Notes 3 & 4) Latch−Up
JEDEC Standard 17
100
3. This parameter is tested initially and after a design or process change that affects the parameter. 4. Latch−up protection is provided for stresses up to 1.