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Low Phase Noise, 1-to-2, 3.3V, 2.5V LVPECL Output Fanout Buffer
IDT8SLVP1102I
DATASHEET
General Description
The IDT8SLVP1102I is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8SLVP1102I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the IDT8SLVP1102I ideal for those clock distribution applications demanding well-defined performance and repeatability. One differential input and two low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device input. The device is optimized for low power consumption and low additive phase noise.
Features
• Two low skew, low additive jitter LVPECL output pairs • Differential PCLK, nPCLK pair can accept the following differential
input levels: LVDS, LVPECL, CML
• Maximu.