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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 4ĆInput OR/NOR Gate
The MC10E/100E101 is a quad 4-input OR/NOR gate.
• 500ps Max. Propagation Delay • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC (Top View) D3a D3b D3c D3d VCCO Q3 Q3
25 24 23 22 21 20 19
D2d 26
18
Q2
D2c 27
17 Q2
D2b 28
16 VCC
VEE 1
15 Q1
D2a 2
14 Q1
D1d 3
13 Q0
D1c 4
12 Q0
5 6 7 8 9 10 11
D1b D1a D0d D0c D0b D0a VCCO * All VCC and VCCO pins are tied together on the die.
MC10E101 MC100E101
QUAD 4-INPUT OR/NOR GATE
FN SUFFIX PLASTIC PACKAGE
CASE 776-02
12/93
© Motorola, Inc. 1996
LOGIC DIAGRAM
D0a D0b Q0 D0c Q0 D0d
D1a D1b Q1 D1c Q1 D1d
D2a D2b Q2 D2c Q2 D2d
D3a D3b Q3 D3c Q3 D3d
2–1
Pin
D0a – D3d Q0 – Q3 Q0 – Q3
PIN NAMES Function
Data Inputs True Outputs Inverting Outputs
REV 2
MC10E101 MC100E101
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
0°C
25°C
85°C
Symbol
Characteristic
min typ max min ty.