Document
STN4828
Dual N Channel Enhancement Mode MOSFET
10.0A
DESCRIPTION
The STN4828 is the Dual N-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application , notebook computer power management and other battery powered circuits where high-side switching .
PIN CONFIGURATION SOP-8
FEATURE
60V/10.0A, RDS(ON) = 30mΩ (Typ.) @VGS = 10V
60V/6.0A, RDS(ON) = 35mΩ @VGS = 4.5V
Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOP-8 package design
MARKING
Y: Year Code A: Porduce Code P: Process Code
1
120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com
Copyright © 2007, Stanson Corp.
STN4828 2008. V1
STN4828
Dual N Channel Enhancement Mode MOSFET
10.0A
ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted )
Parameter
Symbol
Drain-Source Voltage
VDSS
Gate-Source Voltage
Continuous Drain Current (TJ=150℃)
TA=25℃ TA=70℃
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Power Dissipation
TA=25℃ TA=70℃
Operation Junction Temperature
VGSS ID IDM IS PD TJ
Storgae Temperature Range
TSTG
Thermal Resistance-Junction to Ambient
RθJA
Typical
60
±20 10.0 6.0
30
10 2.5 1.6 -55/150
-55/150
80
Unit V V A A A W ℃ ℃ ℃/W
2
120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com
Copyright © 2007, Stanson Corp.
STN4828 2008. V1
STN4828
Dual N Channel Enhancement Mode MOSFET
10.0A
ELECTRICAL CHARACTERISTICS ( Ta = 25℃ Unless otherwise noted )
Parameter
Symbol
Condition
Min Typ Max Unit
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
V(BR)DSS VGS=0V,ID=250uA VGS(th) VDS=VGS,ID=250 uA
Gate Leakage Current
Zero Gate Voltage Drain Current
IGSS
IDSS TJ=55℃
VDS=0V,VGS=±20V VDS=48V,VGS=0V VDS=48V,VGS=0V
On-State Drain Current
ID(on)
Drain-source On-Resistance RDS(on)
Forward Tran Conductance
gfs
VDS≦5V,VGS=4.5V
VGS=10V, ID=10A VGS=4.5V, ID=6A
VDS=5.0V,ID=5.3A
Diode Forward Voltage
VSD IS=1.7A,VGS=0V
Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Input Capacitance
Output Capacitance
Reverse TransferCapacitance
Qg Qgs Qgd Ciss Coss Crss
VDS=30V,VGS=5V ID≡5.3A
VDS=30V,VGS=0V f=1MHz
Turn-On Time Turn-Off Time
td(on)
tr
td(off)
tf
VDD=30V,RL=6.8Ω
ID=4.4A,VGEN=10V RG=1Ω
60 V
0.8 2.5 V
±100 1 5
nA uA
25 A 0.030 0.038 Ω 0.035 0.045 24 S
0.8 1.0 V
10 3.5 nC 3.6
890
84 pF
49
10 14 15 20 nS 25 35 10 15
3
120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com
Copyright © 2007, Stanson Corp.
STN4828 2008. V1
STN4828
Dual N Channel Enhancement Mode MOSFET
10.0A
TYPICAL CHARACTERICTICS (25℃ Unless Note)
4
120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com
Copyright © 2007, Stanson Corp.
STN4828 2008. V1
STN4828
Dual N Channel Enhancement Mode MOSFET
10.0A
5
120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com
Copyright © 2007, Stanson Corp.
STN4828 2008. V1
SOP-8 PACKAGE OUTLINE
STN4828
Dual N Channel Enhancement Mode MOSFET
10.0A
6
120 Bentley Square, Mountain View, Ca 94040 USA www.stansontech.com
Copyright © 2007, Stanson Corp.
STN4828 2008. V1
.