MACH221-12

MACH 1 & 2 Families 1 FINAL MACH 1 & 2 FAMILIES COM’L: -7/10/12/15 IND: -10/-12/14/18 MACH221-7/10/12/15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS x 68 Pins in PLCC x 96 Macrocells x 7.5 ns tPD Commercial, 10 ns tPD Industrial x 133 MHz fCNT x 48 I/Os; 4 dedicated inputs; 4 dedicated inputs/clocks x 96 Flip-flops; 4 clock choices x 8 “PALCE26V12" blocks with buried macrocells x SpeedLocking™ for guaranteed fixed timing x Bus-Friendly™ Inputs and I/Os x Peripheral Component Interconnect (PCI) compliant (-7/-10/-12) x Programmable power-down mode GENERAL DESCRIPTION The MACH221 is a member of Vantis’ high-performance EE CMOS MACH® 1 & 2 families. This device has approximately nine times the logic macrocell capability of the popular PALCE22V10 without loss of speed. The MACH221 consists of eight PAL® blocks interconnected by a programmable switch matrix. The eight PAL blocks are essentially “PALCE26V12" structures complete with product-term arrays, programmable macrocells, which can be programmed as high speed or low power, and buried macrocells. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently. The MACH221 has two kinds of macrocell: output and buried. The output macrocell provides registered, latched, or combinatorial outputs with programmable polarity. If a registered configuration...