IS65WV5128DBLL

IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL 512K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM F EB R U ARY 2012 FEATURES High-speed access time: 35, 45, 55 ns CMOS low power operation 36 mW (typical) operating 9 µW (typical) CMOS standby TTL compatible interface levels Single power supply 1.65V – 2.2V Vdd (IS62WV5128DALL) 2.3V – 3.6V Vdd (IS62WV5128DBLL) Fully static operation: no clock or refresh required Three state outputs Industrial and Automotive temperature support Lead-free available DESCRIPTION The ISSI IS62WV5128DALL / IS62WV5128DBLL are high-speed, 4M bit static RAMs organized as 512K words by 8 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields highperformance and low power consumption devices. When CS1 is HIGH (deselected) the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62WV5128DALL and IS62WV5128DBLL are packaged in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin SOP and 36-pin mini BGA. FUNCTIONAL BLOCK DIAGRAM A0-A18 VDD GND I/O0-I/O7 DECODER I/O DATA CIRCUIT 512K x 8 MEMORY ARRAY COLUMN I/O CS1 OE WE CONTROL CIRCUIT Copyright ©...