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C8051F804 Datasheet (PDF)

Features architecture; executes 70% of instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler Memory - Up to 512 bytes internal data RAM (256 + 256) - Up to 16 kB Flash; In-system programmable in 512-byte sectors Digital Peripherals - 17 or 13 Port I/O with high sink current - Hardware enhanced UART, SMBus™ (I2C compati- ble), and enhanced SPI™ serial ports - Three general purpose 16-bit counter/timers - 16-Bit programmable counter array (PCA) with 3 capture/compare modules and enhanced PWM functionality - Real time clock mode using timer and crys.



Datasheet C8051F804 Silicon Laboratories C8051F804
Capacitance to Digital Converter - Supports buttons, sliders, wheels, and capacitive proximity sensing - Fast 40 µs per .


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