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C8051F707 Datasheet (PDF)

Features oltage 1.8 to 3.6 V - Built-in voltage supply monitor C8051F70x/71x Mixed Signal ISP Flash MCU Family High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler Memory - 512 bytes internal data RAM (256 + 256) - Up to 16 kB Flash; In-system programmable in 512- byte Sectors - Up to 32-byte data EEPROM Digital Peripherals - Up to 54 Port I/O with high sink current - Hardware enhanced UART, SMBus™ (I2C compati- ble), and enhanced SPI™ serial ports - Four general purp.



Datasheet C8051F707 Silicon Laboratories C8051F707
CROSSBARNot Recommended for New Designs Ext. Memory I/F Capacitance to Digital Converter - Supports buttons, sliders, w.


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