uPD46365362B |
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Part Number | uPD46365362B |
Manufacturer | Renesas (https://www.renesas.com/) |
Description | The μPD46365092B is a 4,194,304-word by 9-bit, the μPD46365182B is a 2,097,152-word by 18-bit and the μPD46365362B is a 1,048,576-word by 36-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The μPD46365092B, μPD46365182B a... |
Features |
• 1.8 ± 0.1 V power supply • 165-pin PLASTIC BGA (13 x 15) • HSTL interface • PLL circuitry for wide output data valid window and future frequency scaling • Separate independent read and write data ports with concurrent transactions • 100% bus utilization DDR READ and WRITE operation • Two-tick burst for low DDR transaction size • Two input clocks (K and K#) for precise DDR timing at clock rising edges only • Two output clocks (C and C#) for precise flight time and clock skew matching-clock and data delivered together to receiving device • Internally self-timed write control • Clock-stop capab... |
Datasheet |
uPD46365362B Data Sheet
PDF 584.33KB |
Distributor | Stock | Price | Buy |
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No. | Part # | Manufacture | Description | Datasheet |
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Renesas |
36M-BIT QDR II SRAM 4-WORD BURST OPERATION |
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Renesas |
36M-BIT QDR II SRAM 4-WORD BURST OPERATION |
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Renesas |
36M-BIT QDR II SRAM 2-WORD BURST OPERATION |
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Renesas |
36M-BIT QDR II SRAM 4-WORD BURST OPERATION |
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Renesas |
36M-BIT QDR II SRAM 2-WORD BURST OPERATION |
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Renesas |
36M-BIT QDR II SRAM 4-WORD BURST OPERATION |
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Renesas |
36M-BIT DDR II SRAM 2-WORD BURST OPERATION |
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Renesas |
36M-BIT DDR II SRAM 2-WORD BURST OPERATION |
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Renesas |
36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION |
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Renesas |
36M-BIT DDR II SRAM 2-WORD BURST OPERATION |
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Renesas |
36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION |
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NEC |
32M-BIT CMOS MOBILE SPECIFIED RAM 2M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION |
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