PZ5128 128 macrocell CPLD

PZ5128 128 macrocell CPLD

The PZ5128 CPLD (Complex Programmable Logic Device) is the third in a family of Fast Zero Power (FZP™) CPLDs from Philips Semiconductors. These devices combine high speed and zero power in a 128 macrocell CPLD. With the FZP™ design technique, the PZ5128 offers true pin-to-pin speeds of 7.5ns, while .

Features

• Industry’s first TotalCMOS™ PLD
  – both CMOS design and process technologies
• Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed
• IEEE 1149.1
  –compliant, JTAG Testing Capability
  – 4 pin JTAG interface (TCK, TMS, TDI, TDO)
  – IEEE 1149.1 TAP Controller
  – JTAG commands include: Bypass, Sample/Preload, Extest, Usercode, Idcode, HighZ
• 5 Volt, In
  –System Programmable (ISP) using the JTAG interface
  – On
  –chip supervoltage generation
  – ISP commands include: Enable, Erase, Program, Verify
  – Supported by multiple ISP programming platforms
• High speed pin-to-pin delay.