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UPD42S17405LLA-A60
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UPD42S17405LLA-A60 3.3V OPERATION 16M-BIT DYNAMIC RAM

Document Datasheet DataSheet (332.16KB)

UPD42S17405LLA-A60 3.3V OPERATION 16M-BIT DYNAMIC RAM

The µPD42S17405L, 4217405L are 4,194,304 words by 4 bits CMOS dynamic RAMs with optional EDO. EDO is a kind of the page mode and is useful for the read operation. Besides, the µPD42S17405L can execute CAS before RAS self refresh. The µPD42S17405L, 4217405L are packaged in 26-pin plastic TSOP (II) an.

Features


• EDO (Hyper page mode)
• 4,194,304 words by 4 bits organization
• Single +3.3 V ±0.3 V power supply
• Fast access and cycle time Power consumption Active (MAX.) 660 mW 360 mW 324 mW Part number Access time (MAX.) 50 ns 60 ns 70 ns R/W cycle time (MIN.) 84 ns 104 ns 124 ns EDO (Hyper page mode) cycle time (MIN.) 20 ns 25 ns 30 ns µPD42S17405L-A50, 4217405L-A50 µPD42S17405L-A60, 4217405L-A60 µPD42S17405L-A70, 4217405L-A70
• µPD42S17405L can execute CAS before RAS self refresh Power consumption at standby (MAX.) 0.54 mW (CMOS level input) Part number Refresh cycle 2,048 cycles/128 ms Re.

UPD42S17405LLA-A60 UPD42S17405LLA-A60 UPD42S17405LLA-A60
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