H55S5132EFR-60M |
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| Part Number | H55S5132EFR-60M |
| Manufacturer | Hynix Semiconductor |
| Description | and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 1.2 / Sep. 2010 1 il;o;nar 512Mbit (16Mx32bit) Mob... |
| Features |
● ● ● Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During burst Read or Write operation, a different bank is activated and burst Read or Write for that bank is performed - During auto precharge burst Read or Write, burst Read or Write for a different bank is performed Power Supply Voltage: VDD = 1.8V, VDDQ = 1.8V LVCMOS compatible I/O Interface Low Voltage interface ... |
| Document |
 H55S5132EFR-60M Data Sheet
PDF 949.60KB |
| Distributor | Stock | Price | Buy |
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| No. | Part # | Manufacture | Description | Datasheet |
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Hynix Semiconductor |
512Mbit (16Mx32bit) Mobile SDR Memory |
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Hynix Semiconductor |
512Mbit (16Mx32bit) Mobile SDR Memory |
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Hynix Semiconductor |
512Mbit (16Mx32bit) Mobile SDR Memory |
|
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|
Hynix Semiconductor |
512Mbit (16Mx32bit) Mobile SDR Memory |
|
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|
|
Hynix Semiconductor |
512Mbit (16Mx32bit) Mobile SDR Memory |
|
|
|
|
Hynix Semiconductor |
512Mbit (16Mx32bit) Mobile SDR Memory |
|
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|
Hynix Semiconductor |
512Mbit (16Mx32bit) Mobile SDR Memory |
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Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 1M x 4Bank x32 I/O |
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Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 1M x 4Bank x32 I/O |
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|
Hynix Semiconductor |
128MBit MOBILE SDR SDRAMs based on 1M x 4Bank x32 I/O |
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