AS4C1M16S 1M x 16 bit Synchronous DRAM

AS4C1M16S 1M x 16 bit Synchronous DRAM

Table 3. Pin Details of EM636165 Symbol CLK Type Input Description Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers. Clock Enable: CKE activates (HIGH) and deac.

Features

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• Fast access time: 5.4ns Fast clock rate: 143 MHz Self refresh mode: standard Internal pipelined architecture 512K word x 16-bit x 2-bank Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential or Interleaved - Burst stop function Individual byte controlled by LDQM and UDQM Auto Refresh and Self Refresh 4096 refresh cycles/64ms CKE power down mode JEDEC standard +3.3V±0.3V power supply Interface: LVTTL 50-pin 400 mil plastic TSOP II package -Pb and Halogen Free Overview The AS4C1M16S SDRAM is a high-speed CMOS synchronous.