HYB18T256161BF-25 256-Mbit x16 DDR2 SDRAM

HYB18T256161BF-25 256-Mbit x16 DDR2 SDRAM

The 256-Mb DDR2 DRAM is a high-speed Double-Data-Rate-Two CMOS Synchronous DRAM device containing 268,435,456 bits and internally configured as a quad bank DRAM. The 256-Mb device is organized as 4 Mbit × 16 I/O × 4 banks chip. These synchronous devices achieve high speed transfer rates starting at.

Features

The 256-Mbit Double-Data-Rate-Two SDRAM offers the following key features:
• Data masks (DM) for write data
• 1.8 V ± 0.1V VDD for [
  –20/
  –25/
  –28]
• 1.8 V ± 0.1V VDDQ for [
  –20/
  –25/
  –28]
• Posted CAS by programmable additive latency for better
• DRAM organizations with 16 data in/outputs command and data bus efficiency
• Double Data Rate architecture:
• Off-Chip-Driver impedance adjustment (OCD) and On
  – two data transfers per clock cycle Die-Termination (ODT) for better signal quality.
  – four internal banks for concurrent operation
• Auto-Precharge operation for read and write bursts
• Programmab.