HYMD512M646AFS8-D4 Datasheet

HYMD512M646AFS8-D4 Unbuffered DDR SO-DIMM

and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.2 / Apr. 2004 1 128Mx64 bits Unbuffered DDR SO-DIMM HYMD512M646A(L)FS8-D43/D4 DESCRIPTION www.DataSheet4U.com Hynix HYMD512M646A(L).

Features

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• 1GB (128M x 64) Unbuffered DDR SO-DIMM based on 128Mx8 DDR MCP SDRAM 200-pin small outline dual in-line memory module (SO-DIMM) 2.6V +/- 0.1V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2 interface Fully differential clock operations (CK & /CK) with 200MHz All addresses and control inputs except Data, Data strobes and Data masks latched on the rising edges of the clock Data(DQ), Data strobes and Write masks latched on both rising and falling edges of the clock
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• Data inputs on DQS centers when write (centered DQ) Data strobes synchronized.