HYMD512G726AM4-H Registered DDR SDRAM DIMM

HYMD512G726AM4-H Registered DDR SDRAM DIMM

and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.2 / Feb. 2004 1 128Mx72 bits HYMD512G726A(L)4-M/K/H/L DESCRIPTION www.DataSheet4U.com Registered DDR SDRAM DIMM Hynix HYMD512G726A.

Features

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• 1GB (128M x 72) Registered DDR DIMM based on 128Mx4 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) Error Check Correction (ECC) Capability Registered inputs with one-clock delay Phase-lock loop (PLL) clock driver to reduce loading 2.5V +/- 0.2V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2 interface
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• Fully differential clock operations (CK & /CK) with 125MHz/133MHz Programmable CAS Latency 2 / 2.5 supported Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode tRAS Lock-out function supported In.