Document | DataSheet (682.68KB) |
The CY7C1410JV18, CY7C1425JV18, CY7C1412JV18, and CY7C1414JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has data outputs to support read oper.
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Configurations
CY7C1410JV18
– 4M x 8 CY7C1425JV18
– 4M x 9 CY7C1412JV18
– 2M x 18 CY7C1414JV18
– 1M x 36
Separate independent read and write data ports
❐ Supports concurrent transactions 267 MHz clock for high bandwidth 2-word burst on all accesses (data transferred at 534 MHz) at 267 MHz
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■ Double Data Rate (DDR) interfaces on both read and write ports www.DataSheet4U.com
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Functional Description
The CY7C1410JV18, CY7C1425JV18, CY7C1412JV18, and CY7C1414JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports: t.
Distributor | Stock | Price | Buy |
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No. | Part # | Manufacture | Description | Datasheet |
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1 | CY7C1412AV18 |
Cypress Semiconductor |
(CY7C14xxAV18) 36-Mbit QDR-II SRAM 2-Word Burst Architecture | |
2 | CY7C1412KV18 |
Cypress Semiconductor |
36-Mbit QDR II SRAM Two-Word Burst Architecture | |
3 | CY7C1412V18 |
Cypress Semiconductor |
(CY7C14xxV18) SRAM 2-Word Burst Architecture | |
4 | CY7C141 |
Cypress Semiconductor |
1K x 8 Dual-Port Static RAM | |
5 | CY7C1410AV18 |
Cypress Semiconductor |
(CY7C14xxAV18) 36-Mbit QDR-II SRAM 2-Word Burst Architecture | |
6 | CY7C1410JV18 |
Cypress Semiconductor |
(CY7C14xxJV18) SRAM 2-Word Burst Architecture | |
7 | CY7C1410V18 |
Cypress Semiconductor |
(CY7C14xxV18) SRAM 2-Word Burst Architecture | |
8 | CY7C1411AV18 |
Cypress Semiconductor |
(CY7C14xxAV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture | |
9 | CY7C1411BV18 |
Cypress Semiconductor |
(CY7C14xxBV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture | |
10 | CY7C1411JV18 |
Cypress Semiconductor |
(CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture | |
11 | CY7C1411KV18 |
Cypress Semiconductor |
36-Mbit QDR II SRAM Four-Word Burst Architecture | |
12 | CY7C1413AV18 |
Cypress Semiconductor |
(CY7C14xxAV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture | |
13 | CY7C1413BV18 |
Cypress Semiconductor |
(CY7C14xxBV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture | |
14 | CY7C1413JV18 |
Cypress Semiconductor |
(CY7C14xxJV18) 36-Mbit QDR-II SRAM 4-Word Burst Architecture | |
15 | CY7C1413KV18 |
Cypress Semiconductor |
36-Mbit QDR II SRAM Four-Word Burst Architecture |