The ASPEN device (TXC-05810B) is a revolutionary, RISC-based processor designed to support the requirements of next generation multi-service access systems. The ASPEN supports CellBus operation in both cell and packet modes via two independent CellBus ports. The ASPEN and CellBus may be configured .
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• 155 Mbit/s bidirectional throughput RISC-based hardware architecture Dual independent CellBus interfaces for increased bandwidth or redundancy UTOPIA Level 2P interface for cell and packet transport 64-bit synchronous SRAM port for data storage Utilizes ASPEN ATM AccessEDGE firmware for design and field upgrades Cell insertion/extraction through host interface Message-based interface for host-ASPEN communication Interoperable with ASPEN-PX (TXC-05811) enabling ASPEN to address up to 64 UTOPIA Level 2 ports
ASPEN Device
DESCRIPTION
The ASPEN device (TXC-05810B) is a revolu.
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