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CY7C1370D |
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| Part Number | CY7C1370D |
| Manufacturer | Cypress |
| Description | CY7C1370D CY7C1372D 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features ■ Pin-compatible and functionall... |
| Features |
■ Pin-compatible and functionally equivalent to ZBT™ ■ Supports 250-MHz bus operations with zero wait states ❐ Available speed grades are 250, 200, and 167 MHz ■ Internally self-timed output buffer control to eliminate the need to use asynchronous OE ■ Fully registered (inputs and outputs) for pipelined operation ■ Byte write capability ■ 3.3 V core power supply (VDD) ■ 3.3 V/2.5 V I/O power supply (VDDQ) ■ Fast clock-to-output times ❐ 2.6 ns (for 250 MHz device) ■ Clock enable (CEN) pin to suspend operation ■ Synchronous self-timed writes ■ Available in JEDEC-standard Pb-free 100-pin TQFP, Pb... |
| Document |
 CY7C1370D Data Sheet
PDF 734.23KB |
| Distributor | Stock | Price | Buy |
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| No. | Part # | Manufacture | Description | Datasheet |
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Cypress Semiconductor |
(CY7C1370B / CY7C1372B) 512K X 36/1M X 18 Pipelined SRAM |
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Cypress |
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture |
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Cypress |
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture |
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Cypress Semiconductor |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM |
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Cypress Semiconductor |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM |
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Cypress Semiconductor |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM |
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Cypress Semiconductor |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM |
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Cypress Semiconductor |
(CY7C1371B / CY7C1373B) 512K x 36/1M x 18 Flow-Thru SRAM |
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Cypress |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture |
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Cypress Semiconductor |
18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM |
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