HYMP512Uxxx Hynix DDR2 SDRAM Unbuffered DIMMs Based on 512M Datasheet. Stock, Price

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HYMP512Uxxx

Hynix
HYMP512Uxxx
HYMP512Uxxx HYMP512Uxxx
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Part Number HYMP512Uxxx
Manufacturer Hynix
Description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0 / Apr. 2005 1 1240pin DDR2 SDRA...
Features
• JEDEC standard Double Data Rate2 Synchrnous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface 4 Bank architecture Posted CAS Programmable CAS Latency 3 , 4 , 5 OCD (Off-Chip Driver Impedance Adjustment) ODT (On-Die Termination)







• Fully differential clock operations (CK & CK) Programmable Burst Length 4 / 8 with both sequential and interleave mode Auto refresh and self refresh supported 8192 refresh cycles / 64ms Serial presence detect with EEPROM DDR2 SDRAM Package: 60ball FBGA(64Mx8), 84ball FBGA(32Mx16) 133.35 x ...

Document Datasheet HYMP512Uxxx Data Sheet
PDF 442.92KB


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