TB62707F 8BIT LATCHES & CONSTANT CURRENT DRIVERS

TB62707F 8BIT LATCHES & CONSTANT CURRENT DRIVERS

TB62707F PIN No. 1 2 4~11 3 12 13 14~21 22 23 24 PIN NAME LATCH ENABLE IN0~7 NC L−GND P−GND OUT0~7 P−GND REXT VDD FUNCTION Input terminal of a data strobe. Latches passes data with "H" level input of LATCH −terminal, and hold data with "L" level input. Input terminal of output enable. All output.

Features

Constant Current Output: Can set up all output current with one resistor for 5 to 90mA. Constant Output Current Matching: OUTPUT−GND VOLTAGE ≥ 0.4 [V] ≥ 0.7 [V] CURRENT MATCHING ±6.0 [%] ±6.0 [%] OUTPUT CURRENT 5~40 mA 40~90 mA 5 V CMOS Compatible Input Package: SSOP24−P−300 Weight: 0.32 g (typ.) 1 2003-05-14 PIN CONNECTION (Top view) TB62707F BLOCK DIAGRAM TIMING DIAGRAM Note: Latches are level sensitive, not rising edge sensitive and not synchronous CLOCK. Input of LATCH −terminal to "H" level, data passes latches, and input to "L" level, data hold latches. Input of ENABLE −termi.