MT5C1001 |
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Part Number | MT5C1001 |
Manufacturer | ASI |
Description | The MT5C1001 employs low power, high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes while CMOS circuitry reduces power consumption an... |
Features |
• • • • • • • High Speed: 20, 25, 35, and 45 Battery Backup: 2V data retention Low power standby Single +5V (+10%) Power Supply Easy memory expansion with CE and OE options. All inputs and outputs are TTL compatible Three-state output 32-Pin Flat Pack (F) OPTIONS • Timing 20ns access 25ns access 35ns access 45ns access 55ns access 70ns access • Package(s) Ceramic DIP (400 mil) Ceramic LCC Ceramic Flatpack Ceramic SOJ MARKING -20 -25 -35 -45 -55* -70* A10 A11 A12 NC A13 A14 A15 NC A16 A17 A18 A19 NC Q WE Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 ... |
Datasheet |
MT5C1001 Data Sheet
PDF 166.87KB |
Distributor | Stock | Price | Buy |
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No. | Part # | Manufacture | Description | Datasheet |
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Micross |
1M x 1 SRAM |
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Micron |
1 Meg x 1 SRAM |
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ASI |
SRAM MEMORY ARRAY |
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Micross |
256K x 4 SRAM |
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Micron |
256K x 4 SRAM |
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ASI |
128K x 8 SRAM WITH DUAL CHIP ENABLE AVAILABLE AS MILITARY SPECIFICATIONS |
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Micron |
128K x 8 SRAM |
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Austin Semiconductor |
128K x 8 SRAM WITH DUAL CHIP ENABLE ULTRA LOW POWER |
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Micross |
128K x 8 SRAM |
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Micron |
128K x 9 SRAM |
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