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SPD13N05L
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SPD13N05L SIPMOS Power Transistor

Document Datasheet DataSheet (139.77KB)

SPD13N05L SIPMOS Power Transistor

SPD13N05L SPU13N05L SIPMOS ® Power Transistor • N channel • Enhancement mode • Logic Level • Avalanche-rated • dv /dt rated • 175°C operating temperature Pin 1 Pin 2 Pin 3 G D S Type VDS 55 V 55 V ID 12.5 A 12.5 A RDS(on) 0.12 Ω 0.12 Ω Package Ordering Code SPD13N05L SPU13N05L P-TO252 P.

Features

ature Storage temperature Thermal resistance, junction - case Thermal resistance, junction - ambient (PCB mount)** Thermal resistance, junction - ambient IEC climatic category, DIN IEC 68-1 Tj Tstg RthJC RthJA RthJA -55 ... + 175 -55 ... + 175 °C ≤ 4.3 ≤ 50 ≤ 100 55 / 175 / 56 K/W ** when mounted on 1 " square PCB ( FR4 );for recommended footprint Electrical Characteristics, at Tj = 25°C, unless otherwise specified Parameter Symbol min. Static Characteristics Values typ. max. Unit Drain- source breakdown voltage V GS = 0 V, ID = 0.25 mA, Tj = 25 °C V (BR)DSS V 55 - Gate threshold vo.

SPD13N05L SPD13N05L SPD13N05L
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