8XC552 80C51 FAMILY DERIVATIVES

8XC552 80C51 FAMILY DERIVATIVES

of SIO1 (I2C). • The SFRs for the interface: S1ADR, S1DAT, S1STA, and S1CON are not implemented. The two SIO1 related flags ES1 in SFR IEN0 and PS1 in SFR IP0 are also not implemented. These two 1996 Aug 06 2 Philips Semiconductors 80C51 Family Derivatives 8XC552/562 overview (FFFFH) 64K (FFF.

Features

OM, 256 bytes RAM 87C552: 8k bytes EPROM, 256 bytes RAM 80C552: ROMless version of the 83C552 The 8XC552 contains a nonvolatile 8k × 8 read-only program memory, a volatile 256 × 8 read/write data memory, five 8-bit I/O ports and one 8-bit input port, two 16-bit timer/event counters (identical to the timers of the 80C51), an additional 16-bit timer coupled to capture and compare latches, a fifteen-source, two-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART and I2C bus), a “watchdog” timer, and on-chip oscillator.