74LVT74 NXP 3.3V Dual D-type flip-flop

logo


74LVT74

NXP
74LVT74
74LVT74 74LVT74
zoom Click to view a larger image
Part Number 74LVT74
Manufacturer NXP (https://www.nxp.com/)
Description The 74LVT74 is a dual positive edge-triggered D-type flip-flop featuring individual data, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous ac...
Features not directly related to the transition time of the positive-going pulse. Following the hold time interval, data at the D input may be changed without affecting the levels of the output. tPLH tPHL CIN ICC 3.1 3.6 3 0.5 ns pF mA PIN CONFIGURATION RD0 D0 CP0 SD0 Q0 Q0 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC RD1 D1 CP1 SD1 Q1 Q1 PIN DESCRIPTION PIN NUMBER 2, 12 3, 11 4, 10 1, 13 5, 6, 8, 9 SF00045 SYMBOL D0, D1 CP0, CP1 SD0, SD1 RD0, RD1 Qn, Qn NAME AND FUNCTION Data inputs Clock inputs (active rising edge) Set inputs (active LOW) Reset inputs (active LOW) Data outputs LOGIC SYMBOL (IEE...

Datasheet Datasheet 74LVT74 Data Sheet
PDF 88.19KB


Distributor Stock Price Buy




Similar Datasheet

No. Part # Manufacture Description Datasheet
1
74LVT00

NXP
3.3V Quad 2-input NAND gate
Datasheet
2
74LVT02

NXP
3.3V Quad 2-input NOR gate
Datasheet
3
74LVT02

nexperia
3.3V Quad 2-input NOR gate
Datasheet
4
74LVT04

NXP
3.3V Hex inverter
Datasheet
5
74LVT04

nexperia
Hex inverter
Datasheet
6
74LVT04-Q100

nexperia
Hex inverter
Datasheet
7
74LVT08

NXP
3.3V Quad 2-input AND gate
Datasheet
8
74LVT08

nexperia
3.3V Quad 2-input AND gate
Datasheet
9
74LVT10

NXP
3.3V Triple 3-input NAND gate
Datasheet
10
74LVT125

NXP
3.3V Quad buffer
Datasheet
More datasheet from NXP



Since 2014 :: D4U Semiconductor :: (Privacy Policy & Contact)