PHT1N60R PowerMOS transistor

PHT1N60R PowerMOS transistor

N-channel enhancement mode field-effect power transistor in a plastic envelope suitable for surface mounting featuring high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance. Intended for use in Compact Fluorescent Lights (CFL) and general purp.

Features

Source-drain diode current (DC) Source-drain diode current (pulse peak value) Total power dissipation Storage temperature Junction temperature CONDITIONS RGS = 20 kΩ Tsp = 25 ˚C Tsp = 100 ˚C Tsp = 25 ˚C Tsp = 25 ˚C Tsp = 25 ˚C Tsp = 25 ˚C MIN. -55 MAX. 600 600 30 0.53 0.4 2.12 0.53 2.12 1.8 150 150 UNIT V V V A A A A A W ˚C ˚C AVALANCHE LIMITING VALUE SYMBOL PARAMETER WDSS CONDITIONS MIN. MAX. UNIT Drain-source non-repetitive ID = 2 A ; VDD ≤ 50 V ; VGS = 10 V ; unclamped inductive turn-off RGS = 50 Ω energy Tj = 25˚C prior to surge Tj = 100˚C prior to surge Drain-source repetitive ID = 2 A ;.