Pixel data input to the first line delay (most significant byte in 16-bit mode). Pixel data input to the second group of line delays. (least significant byte in 16-bit mode). Alternatively an output from the last line delay when the appropriate mode bit is set. The first line delay in the first grou.
s The PDSP16488A is a replacement for the PDSP16488 (see Note below) s 8 or 16-bit Pixels with rates up to 40 MHz s Window Sizes up to 838 with a Single Device s Eight Internal Line Delays s Supports Interlace and Frame-to-Frame Operations s Coefficients Supplied from an EPROM or Remote Host s Expandable in both X and Y for Larger Windows s Gain Control and Pixel Output Manipulation s 84-pin PGA or 132-pin QFP Package Options Note: PDSP16488A devices are not guaranteed to cascade with PDSP16488 devices. Mitel Semiconductor do not recommend that PDSP16488A be mixed with PDSP16488 devices in a s.
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