PDSP16116AB0GG 16 X 16 Bit Complex Multiplier

PDSP16116AB0GG 16 X 16 Bit Complex Multiplier

16-bit input for real X data 16-bit input for imaginary X data 16-bit input for real Y data 16-bit input for imaginary Y data 16-bit output for real P data 16-bit output for imaginary P data Clock; new data is loaded on rising edge of CLK Clock, enable X-port input register Clock, enable Y-port inpu.

Features

I Complex Number (16116)3(16116) Multiplication I Full 32-bit Result I 20MHz Clock Rate I Block Floating Point FFT Butterfly Support I (21)3(21) Trap I Two’s Complement Fractional Arithmetic I TTL Compatible I/O I Complex Conjugation I 2 Cycle Fall Through I 144-pin PGA or QFP packages APPLICATIONS I Fast Fourier Transforms I Digital Filtering I Radar and Sonar Processing I Instrumentation I Image Processing ORDERING INFORMATION PDSP16116 MC GGDR PDSP16116A B0 AC PDSP16116A A0 AC PDSP16116A B0 GG PDSP16116A MC GGDR PDSP16116B B0 AC PDSP16116D B0 GG 10MHz MIL-883 screened 20MHz Industrial 20MHz.