PCK2509S |
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| Part Number | PCK2509S |
| Manufacturer | NXP (https://www.nxp.com/) |
| Description | The PCK2509S is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver. It uses a PLLto precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (... |
| Features |
• Phase-Locked Loop Clock distribution for PC100/PC133 SDRAM applications • Spread Spectrum clock compatible • Operating frequency 50 to 150 MHz • (tphase error – jitter) at 100 to133 MHz = ±50 ps • Jitter (peak-peak) at 100 to 133 MHz = ± 80 ps • Jitter (cycle-cycle) at 100 to 133 MHz = 65 ps • Pin-to-pin skew < 200 ps • Available in plastic 24-Pin TSSOP • Distributes one clock input to one bank of ten outputs • External Feedback (FBIN) terminal Is used to synchronize the outputs to the clock input adjusted to 50 percent, independent of the duty cycle at CLK. Each bank of outputs can be en... |
| Datasheet |
 PCK2509S Data Sheet
PDF 70.65KB |
| Distributor | Stock | Price | Buy |
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