QL4016 QuickRAM Data Sheet • • • • • • 16,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density • 16,000 Usable PLD Gates with 118 I/Os • 300 MHz 16-bit Counters, 400 MHz Advanced I/O Capabilities • Interfaces with both 3.
up to 16 simultaneous inputs and five outputs within a cell that can be fragmented into five independent cells. Each cell has a fanin of 29 including register and control lines (see Figure 3).
WDATA
RAM Module (1,152 bits)
RDATA
WADDR
RADDR
RAM Module (1,152 bits) WDATA RDATA
Figure 2: QuickRAM Module Bits
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© 2002 QuickLogic Corporation
QL4016 QuickRAM Data Sheet Rev I
Product Summary
Total of 118 I/O Pins
• 110 bi-directional input/output pins, PCI-compliant for 5.0 V and 3.3 V buses for
-1/-2/-3/-4 speed grades
• 8 high-drive input/distributed net.
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