The Cypress PALC22V10 is a CMOS second-generation programmable logic array device. It is implemented with the familiar sum-of-products (AND-OR) logic structure and a new concept, the “programmable macrocell.” Logic Block Diagram (PDIP/CDIP) VSS 12 I 11 I 10 I 9 I 8 I 7 I 6 I 5 I 4 I 3 I 2 CP/I 1 P.
• Advanced second-generation PAL architecture
• Low power — 55 mA max. “L” — 90 mA max. standard — 120 mA max. military
• CMOS EPROM technology for reprogrammability
• Variable product terms — 2 x (8 through 16) product terms
• User-programmable macrocell — Output polarity control — Individually selectable for registered or combinatorial operation
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• 20, 25, 35 ns commercial and industrial 25, 30, 40 ns military Up to 22 input terms and 10 outputs High reliability — Proven EPROM technology
— 100% programming and functional testing
• Windowed DIP, windowed LCC, DIP, LCC, and PLCC availabl.
Distributor | Stock | Price | Buy |
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No. | Part # | Manufacture | Description | Datasheet |
---|---|---|---|---|
1 | PAL22V10 |
AMD |
24-Pin TTL Versatile PAL Device | |
2 | PAL20C1 |
National Semiconductor |
Progammable Array Logic | |
3 | PAL20L10 |
AMD |
XOR Registered 24 Pin TTL Programmable Array Logic | |
4 | PAL20L10 |
Monolithic Memories |
Military 24 Pin PAL Devices | |
5 | PAL20L10 |
National Semiconductor |
Programmable Array Logic / 24 Pin Exclusive OR PAL |