Document | DataSheet (287.12KB) |
The Cypress PALCE20V8 is a CMOS Flash Erasable second-generation programmable array logic device. It is implemented with the familiar sum-of-product (AND-OR) logic structure and the programmable macrocell. The PALCE20V8 is executed in a 24-pin 300-mil molded DIP, a 300-mil cerdip, a 28-lead square c.
• Active pull-up on data input pins
• Low power version (20V8L) — 55 mA max. commercial (15, 25 ns) — 65 mA max. military/industrial (15, 25 ns)
• Standard version has low power — 90 mA max. commercial (15, 25 ns) — 115 mA max. commercial (10 ns) — 130 mA max. military/industrial (15, 25 ns)
• CMOS Flash technology for electrical erasability and reprogrammability
• User-programmable macrocell — Output polarity control — Individually selectable for registered or combinatorial operation
• QSOP package available — 10, 15, and 25 ns com’l version — 15, and 25 ns military/industrial versions
• High.
Distributor | Stock | Price | Buy |
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No. | Part # | Manufacture | Description | Datasheet |
---|---|---|---|---|
1 | PAL20C1 |
National Semiconductor |
Progammable Array Logic | |
2 | PAL20L10 |
AMD |
XOR Registered 24 Pin TTL Programmable Array Logic | |
3 | PAL20L10 |
Monolithic Memories |
Military 24 Pin PAL Devices | |
4 | PAL20L10 |
National Semiconductor |
Programmable Array Logic / 24 Pin Exclusive OR PAL | |
5 | PAL20L10A |
AMD |
XOR Registered 24-pin TTL Programmable Array Logic |