Document | DataSheet (585.37KB) |
The TH50VSF3680/3681AASB is a mixed multi-chip package containing a 8,388,608-bit Full CMOS SRAM and a 67,108,864-bit flash memory. The CIOS and CIOF inputs can be used to select the optimal memory configuration. The power supply. FLASH MEMORY a Simultaneous Read/Write operation so that data can be .
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• Power supply voltage VCCs = 2.7 V~3.3 V VCCf = 2.7 V~3.3 V Data retention supply voltage VCCs = 1.5 V~3.3 V Current consumption Operating: 45 mA maximum (CMOS level) Standby: 10 µA maximum (SRAM CMOS level) Standby: 10 µA maximum (FLASH) Block erase architecture for flash memory 8 × 8 Kbytes 63 × 64 Kbytes Organization
CIOF VCC VCC VSS CIOS VCC VSS VSS Flash Memory 4,194,304 words of 16 bits 4,194,304 words of 16 bits 8,388,608 words of 8 bits SRAM 524,288 words of 16 bits 1,048,576 words of 8 bits 1,048,576 words of 8 bits
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Function mode control for flash memory Compati.
Distributor | Stock | Price | Buy |
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No. | Part # | Manufacture | Description | Datasheet |
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1 | TH50VSF3680 |
Toshiba Semiconductor |
SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE | |
2 | TH50VSF3582AASB |
Toshiba Semiconductor |
MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS | |
3 | TH50VSF3583AASB |
Toshiba Semiconductor |
MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS | |
4 | TH50VSF2580AASB |
Toshiba Semiconductor |
SRAM AND FLASH MEMORY MIXED MULTI-CHIP | |
5 | TH50VSF2581AASB |
Toshiba Semiconductor |
SRAM AND FLASH MEMORY MIXED MULTI-CHIP |