NXP Semiconductors Data Sheet: Technical Data Document Number: IMX93AEC Rev. 3, 12/2023 MIMX9352AVTXMAB MIMX9332AVTXMAB MIMX9351AVXMAB MIMX9331AVTXMAB i.MX 93 Application Processors Data Sheet for Automotive Products Package Information Plastic Package FCBGA 14 x 14 mm, 0.65 mm pitch Ordering .
(Sheet 1 of 3)
Features
Two Cortex®-A55 processors operating up to 1.7 GHz
• 32 KB L1 Instruction Cache
• 32 KB L1 Data Cache
• 64 KB per-core L2 cache
• Media Processing Engine (MPE) with Arm® NeonTM technology supporting the
Advanced Single Instruction Multiple Data architecture
• Floating Point Unit (FPU) with support of the Arm® VFPv4-D16 architecture
Support of 64-bit Arm® v8.2-A architecture
256 KB cluster L3 cache
Parity/ECC protection on L1 cache, L2 cache, and TLB RAMs
• Stand by monitoring with Cortex®-A55 and other high-power modules power gated
Cortex®-M33 CPU operating up to 250 M.
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