N-Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 60V D RDSON (MAX.) 4.8mΩ ID 21A G UIS, Rg 100% Tested S Pb-Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage .
ACTERISTICS (TJ = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS LIMITS UNIT MIN TYP MAX STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current1 Drain-Source On-State Resistance1 Forward Transconductance1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) RDS(ON) gfs VGS = 0V, ID = 250A VDS = VGS, ID = 250A VDS = 0V, VGS = ±20V VDS = 48V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125 °C VDS = 5V, VGS = 10V VGS = 10V, ID = 20A VGS = 4.5V, ID = 20A VDS = 5V, ID = 20A 60 V 1.0 2.0 3.0 ±100 nA 1 A 25 21 A .
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