ICS527-02 CLOCK SLICER USER CONFIGURABLE PECL INPUT ZERO DELAY BUFFER

ICS527-02 CLOCK SLICER USER CONFIGURABLE PECL INPUT ZERO DELAY BUFFER

The ICS527-02 Clock Slicer is the most flexible way to generate a CMOS output clock from a PECL input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications an.

Features

• Packaged as 28-pin SSOP, Pb-free (150 mil body)
• Synchronizes fractional clocks rising edges
• PECL IN to CMOS OUT
• Pin selectable dividers
• Zero input to output skew
• User determines the output frequency—no software needed
• Slices frequency or period
• Input clock frequency of 1.5 MHz to 200 MHz
• Output clock frequencies from 4 MHz to 160 MHz
• Very low jitter
• Duty cycle of 45/55
• Operating voltage of 3.3 V
• Advanced, low-power CMOS process
• Industrial temperature version available Block Diagram PECLIN PECLIN R6:R0 7 Reference Divider FBIN Feedback Divider 7 F6:F0 2 VDD Ph.