TP2502 Datasheet

TP2502 P-Channel Vertical DMOS FET

The TP2502 low-threshold Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperatur.

Features

•
  –2.4V Maximum Low Threshold
• High Input Impedance
• 125 pF Maximum Low Input Capacitance
• Fast Switching Speeds
• Low On-Resistance
• Free from Secondary Breakdown
• Low Input and Output Leakage Applications
• Logic-Level Interfaces (Ideal for TTL and CMOS)
• Solid-State Relays
• Battery-Operated Systems
• Photovoltaic Drives
• Analog Switches
• General Purpose Line Drivers
• Telecommunication Switches General Description The TP2502 low-threshold Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination.