DS90LT012A Datasheet

DS90LT012A 3V LVDS Single CMOS Differential Line Receiver

The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) te.

Features

1
•2 Compatible with ANSI TIA/EIA-644-A Standard
• >400 Mbps (200 MHz) switching rates
• 100 ps differential skew (typical)
• 3.5 ns maximum propagation delay
• Integrated line termination resistor (102Ω typical)
• Single 3.3V power supply design (2.7V to 3.6V range)
• Power down high impedance on LVDS inputs
• Accepts small swing (350 mV typical) differential signal levels
• LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
• Supports open, short and terminated input fail- safe
• Pinout simplifies PCB layout
• Low Power Dissipation (10mW typical@ 3.3V static)
• SOT-23 5-lead package
• Lead.