F50D1G41LB-50YG2M Datasheet

F50D1G41LB-50YG2M 1.8V 1 Gbit SPI-NAND Flash Memory

ESMT Flash (Preliminary) F50D1G41LB (2M) 1.8V 1 Gbit SPI-NAND Flash Memory PRODUCT LIST Parameters VCC Width Frequency Internal ECC Correction Transfer Rate Power-up Ready Time Max Reset Busy Time Note: 1. x2 PROGRAM operation is not defined. Values 1.8V x1, x21, x4 50/66MHz 1-bit 20/15ns 1ms (m.

Features

Voltage Supply: 1.8V (1.7V~1.95V) Organization - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit Automatic Program and Erase - Page Program: (2K + 64) Byte - Block Erase: (128K + 4K) Byte Page Read Operation - Page Size: (2K + 64) Byte - Read from Cell to Register with Internal ECC: 100us Memory Cell: 1bit/Memory Cell Support SPI-Mode 0 and SPI-Mode 31 Fast Write Cycle Time - Program time:400us - Block Erase time: 4ms Hardware Data Protection - Program/Erase Lockout During Power Transitions Reliable CMOS Floating Gate Technology - Internal ECC Requirement: 1bit/512Byt.