Dual 4-input multiplexer - nexperia
Description
74HC153; 74HCT153
Dual 4-input multiplexer
Rev.
9 — 14 January 2021
Product data sheet
1.
General description
The 74HC153; 74HCT153 is a dual 4-input multiplexer.
The device features independent enable inputs (nE) and common data select inputs (S0 and S1).
For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer output (nY).
A HIGH on E forces the corresponding multiplexer outputs LOW.
Inputs include clamp diodes.
This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
2.
Features and benefits
• Input levels: • For 74HC153: CMOS level • For 74HCT153: TTL level
• Non-inverting outputs • Separate enable input for each output • Common select inputs • Complies with JEDEC standard no.
7A • Permits multiplexing from n lines to 1 line • Enable line provided for cascading (n lines to 1 line) • ESD protection:
• HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +85 °C and -40 °C to +125 °C.
3.
Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
74HC153D
-40 °C to +125 °C
74HCT153D
74HC153DB
-40 °C to +125 °C
Name SO16
SSOP16
74HC153PW 74HCT153PW
-40 °C to +125 °C TSSOP16
Description
plastic small outline package; 16 leads; body width 3.
9 mm
plastic shrink small outline package; 16 leads; body width 5.
3 mm
plastic thin shrink small outline package; 16 leads; body width 4.
4 mm
Version SOT109-1
SOT338-1 SOT403-1
Nexperia
74HC153; 74HCT153
Dual 4-input multiplexer
4.
Functional diagram
6 5 4 3 10 11 12 13
1I0 1I1 1I2 1I3 2I0 2I1 2I2 2I3 14 S0
2 S1
1 1E
15 2E
1Y
2Y
7
Fig.
1.
Logic symbol
9
001aal843
1
6 1I0
2E
5 1I1 4 1I2
MUX
3 1I3
14 S0 2 S1
10 2I0 11 2I1 12 2I2 13 2I3
MUX
2E
15
Fig.
2.
Functional diagram
1Y 7
2Y 9 001aal844
1E 1I3 1I2 1I1 1I0 S0 S1 2I3 2I2 2I1 2I0 2E
1Y
Fig.
3.
Logic diagram
2Y
001aal845
74HC_HCT153
Product data s...
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