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CY2SSTV857-27
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CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant

Document Datasheet DataSheet (89.44KB)

CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant

The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27 generates ten differential pair clock outputs from one differential pair clock input. In addition, the CY2SSTV857-27 features diffe.

Features


• Operating frequency: 60 MHz to 200 MHz
• Supports 266, 333 MHz DDR SDRAM
• 10 differential outputs from 1 differential input
• Spread-Spectrum-compatible
• Low jitter (cycle-to-cycle): < 75
• Very low skew: < 100 ps
• Power management control input
• High-impedance outputs when input clock < 10 MHz
• 2.5V operation
• Pin-compatible with CDC857-2 and -3
• 48-pin TSSOP package
• Industrial temp. of
  –40° to +85°C
• Conforms to JEDEC DDR specification Description The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-sp.

CY2SSTV857-27 CY2SSTV857-27 CY2SSTV857-27
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