Document | DataSheet (89.44KB) |
The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27 generates ten differential pair clock outputs from one differential pair clock input. In addition, the CY2SSTV857-27 features diffe.
• Operating frequency: 60 MHz to 200 MHz
• Supports 266, 333 MHz DDR SDRAM
• 10 differential outputs from 1 differential input
• Spread-Spectrum-compatible
• Low jitter (cycle-to-cycle): < 75
• Very low skew: < 100 ps
• Power management control input
• High-impedance outputs when input clock < 10 MHz
• 2.5V operation
• Pin-compatible with CDC857-2 and -3
• 48-pin TSSOP package
• Industrial temp. of
–40° to +85°C
• Conforms to JEDEC DDR specification
Description
The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-sp.
Distributor | Stock | Price | Buy |
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No. | Part # | Manufacture | Description | Datasheet |
---|---|---|---|---|
1 | CY2SSTV857-27 |
Cypress Semiconductor |
Differential Clock Buffer/Driver DDR333/PC2700-Compliant | |
2 | CY2SSTV857-32 |
Silicon Laboratories |
Differential Clock Buffer/Driver DDR400/PC3200-Compliant | |
3 | CY2SSTV857-32 |
Cypress Semiconductor |
Differential Clock Buffer/Driver DDR400/PC3200-Compliant | |
4 | CY2SSTV8575 |
Cypress Semiconductor |
Differential Clock Buffer/Driver | |
5 | CY2SSTV850 |
Cypress Semiconductor |
Differential Clock Buffer/Driver |