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AS4C512M16D3L |
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| Part Number | AS4C512M16D3L |
| Manufacturer | Alliance Semiconductor |
| Description | Revision History 8Gb: x4, x8, x16 DDR3L SDRAM AS4C2GM4D3L– 256 Meg x 4 x 8 banks* AS4C1G8MD3L– 128 Meg x 8 x 8 banks AS4C512M16D3L – 64 Meg x 16 x 8 banks Revision Rev 1.0 Rev 2.0 Details Prelimina... |
| Features |
• VDD = VDDQ = 1.35V (1.283 –1.45V) • Backward compatible to VDD = VDDQ = 1.5V ±0.075V – Supports DDR3L devices to be backward compatible in 1.5V applications • Differential bidirectional data strobe • 8n-bit prefetch architecture • Differential clock inputs (CK, CK#) • 8 internal banks • Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals • Programmable CAS (READ) latency (CL) • Programmable posted CAS additive latency (AL) • Programmable CAS (WRITE) latency (CWL) • Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS]) • Selectable ... |
| Document |
 AS4C512M16D3L Data Sheet
PDF 4.24MB |
| Distributor | Stock | Price | Buy |
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| No. | Part # | Manufacture | Description | Datasheet |
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Alliance Semiconductor |
8Gbit DDR3L SDRAM |
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Alliance Semiconductor |
8Gbit DDR3L |
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Alliance Semiconductor |
4Gb DDR3L |
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Austin Semiconductor |
1M x 1 DRAM |
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Austin Semiconductor |
256K x 1 DRAM |
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Austin Semiconductor |
256K x 1 DRAM |
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Alliance Semiconductor |
2Gb DDR2 |
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Alliance Semiconductor |
2Gb DDR2 |
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Alliance Semiconductor |
2Gb Double-Data-Rate-3 DRAM |
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Alliance Semiconductor |
Double-data-rate architecture |
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