32-bit MCU
Description
STM32F101x8 STM32F101xB
Medium-density access line, ARM®-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces
Datasheet - production data
Features
Core: ARM® 32-bit Cortex® -M3 CPU – 36 MHz maximum frequency, 1.
25 DMIPS/MHz (Dhrystone 2.
1) performance at 0 wait state memory access – Single-cycle multiplication and hardware division
Memories – 64 to 128 Kbytes of Flash memory – 10 to 16 Kbytes of SRAM
Clock, reset and supply management – 2.
0 to 3.
6 V application supply and I/Os – POR, PDR and programmable voltage detector (PVD) – 4-to-16 MHz crystal oscillator – Internal 8 MHz factory-trimmed RC – Internal 40 kHz RC – PLL for CPU clock – 32 kHz oscillator for RTC with calibration
Low power – Sleep, Stop and Standby modes – VBAT supply for RTC and backup registers
Debug mode – Serial wire debug (SWD) and JTAG interfaces
DMA – 7-channel DMA controller – Peripherals supported: timers, ADC, SPIs, I2Cs and USARTs
1 × 12-bit, 1 µs A/D converter (up to 16 channels) – Conversion range: 0 to 3.
6 V – Temperature sensor
Up to 80 fast I/O ports
LQFP100 14 x 14 mm
LQFP64 10 x 10 mm
LQFP48 7 x 7 mm
UFQFPN48 7 × 7 mm
VFQFPN36 6 × 6 mm
– 26/37/51/80 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant
Six timers – Three 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter – 2 watchdog timers (Independent and Window) – SysTick timer: 24-bit downcounter
Up to 7 communication interfaces – Up to 2 x I2C interfaces (SMBus/PMBus) – Up to 3 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control) – Up to 2 SPIs (18 Mbit/s)
CRC calculation unit, 96-bit unique ID ECOPACK® packages
Table 1.
Device summary
Reference
Part number
STM32F101x8
STM32F101C8, STM32F101R8 STM32F101V8, STM32F101T8
STM32F101xB
STM32F101RB, STM32F101VB, STM32F101CB STM32F101TB
June 2015
This is information on a product in full production.
DocID13586 Rev 17
1/101
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