ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFOs - Hynix Semiconductor
Description
GM16C550
GM16C550
ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFOs
Descriptions
The GM16C550 is an asynchronous communications element (ACE) that is functionally equivalent to the GM16C450, and addition-ally incorporates a 16byte FIFOs are available on both the transmitter and receiver, and can be activated by placing the device in the FIFO mode.
After a reset, the registers of the GM16C550 are identical to those of the GM16C450.
The UART performs serial-to-parallel conver- sion on data characters received from a peri-pheral device or a MODEM, and parallel-to- serial conversion on data characters received from the CPU.
The CPU can read the com- plete status of the UART at any time during the functional operation.
Status information reported includes the type and condition of the transfer operations being performed by the UART, as well as any error conditions (parity, overrun, framing, or break interrupt).
Features
Fully compatible with GM16C450.
Modem controm signals include CTS , RTS , DSR , DTR , RI and - DCD .
l Programmable serial characteristics: — 5-, 6-, 7- or 8-bit characters — Even-, odd-, or no-parity bit generation and detection — 1-, 11/2- or 2-stop bit generation — Baud rate generation (DC to 256K baud) l 16 byte FIFO reduces CPU interrupts.
l Independent control of transmit, receive, line status, data set interrupts, FIFOs.
l Full status reporting capabilities l Three-state, TTL drive capabilities for biderectional data bus and control bus.
l 40DIP/44PLCC l l
Pin Configulation
D0 D1 D2 D3 D4 D5 D6 D7 RCLK SIN SOUT CS0 CS1 CS2 BAUDQUT XTAL1 XTAL2 DOSTR DOSTR VSS VCC RI DCD DSR CTS MR OUT1 DTR RTS OUT2 INTRPT RXRDY A0 A1 A2 ADS TXRDY DDIS DISTR DISTR D4 D3 D2 D1 D0 N.
C.
VCC RI DCD DSR CTS D5 D6 D7 RCLK SIN N.
C.
SOUT CS0 CS1 CS2 BAUDQUT VSS N.
C.
DISTR DISTR DDIS TXRDY
MR OUT1 DTR RTS OUT2 N.
C.
INTRPT RXRDY A0 A1 A2
1
GM16C550 Absolute Maximum Ratings
Temperature under Bias Storage Temperature All Input or Output Voltages with respect to VSS Power Diss...
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